Fabricating semiconductor devices, such as logic and memory devices, typically includes processing a substrate like a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing (CMP), etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
Bonded (or stacked) wafers are frequently used in the semiconductor industry. One or more ultrathin wafers bonded to a carrier wafer is an example of a bonded wafer, though other semiconductor wafer designs also can be bonded wafers. For example, a bonded wafer can include a top wafer (e.g., a device wafer) bonded to a carrier wafer. These bonded wafers can be used for both memory and logic applications. Three-dimensional integrated circuits (3D IC) can be produced using bonded wafers.
Bonded wafers can have complex edge profiles. The various layers of a bonded wafer can have different heights and diameters. These dimensions can be affected by the size of the various wafers prior to stacking or by processing steps.
Bonded wafers with fabrication errors can cause problems during manufacturing. For example, centricity of the bonded wafer affects the CMP process or increases handling risks. During CMP, centricity affects placement of the polishing pad with respect to the center of the bonded wafer and subsequent planarization. During wafer handling, the balance of a bonded wafer or clearance within manufacturing equipment can be affected by centricity of the bonded wafer.
Improper centricity can even ruin a bonded wafer or damage manufacturing equipment. If the bonded wafer is undercut, improperly bonded together, or contains too much glue, then the bonded wafer can break within the CMP tool, contaminating or damaging the CMP tool. Such contamination or damage leads to unwanted downtime or can even stop production within a semiconductor fab.
Furthermore, a CMP process on a bonded wafer with improper centricity can result in undesired edge profiles on the bonded wafer. For example, too much or not enough material may be removed during a CMP process or the CMP process may result in undercuts, overhangs, or whiskers. These undesired edge profiles can affect device yield or can impact later manufacturing steps.
Therefore, what is needed are improved techniques for bonded wafer metrology and associated systems.